ADC3421 datasheet(37/80 Pages) TI2

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Input Clock Duty Cycle (%)

69.5

69.9

70.3

70.7

71.1

71.5

D229

SNR

SFDR

Input Clock Duty Cycle (%)

69.5

77.5

69.7

69.9

82.5

70.1

70.3

87.5

70.5

D230

SNR

SFDR

Differential Clock Amplitude (Vpp)

0.2

0.4

0.6

0.8

1.2

1.4

1.6

1.8

2.2

68.5

69.5

70.5

71.5

100

72.5

105

D227

SNR

SFDR

Differential Clock Amplitude (Vpp)

0.2

0.4

0.6

0.8

1.2

1.4

1.6

1.8

2.2

100

105

D228

SNR

SFDR

Temperature (°C)

-40

-15

D225

DVDD = 1.7 V

DVDD = 1.75 V

DVDD = 1.8 V

DVDD = 1.85 V

DVDD = 1.9 V

Temperature (°C)

-40

-15

69.5

69.9

70.3

70.7

71.1

71.5

D226

DVDD = 1.7 V

DVDD = 1.75 V

DVDD = 1.8 V

DVDD = 1.85 V

DVDD = 1.9 V

ADC3421, ADC3422, ADC3423, ADC3424

www.ti.com

SBAS673A – JULY 2014 – REVISED OCTOBER 2015

Typical Characteristics: ADC3424 (continued)

Typical values are at TA = 25°C, ADC sampling rate = 125 MSPS, 50% clock duty cycle, AVDD = 1.8 V, DVDD = 1.8 V, –1-

dBFS differential input, 2-VPP full-scale, 32k-point FFT, chopper disabled, and SNR reported with a 1-MHz offset from dc

when chopper is disabled and from fS / 2 when chopper is enabled, unless otherwise noted.

Figure 115. Spurious-Free Dynamic Range vs

Figure 116. Signal-to-Noise Ratio vs

DVDD Supply and Temperature (170 MHz)

Figure 117. Performance vs Clock Amplitude (40 MHz)

Figure 118. Performance vs Clock Amplitude (150 MHz)

Figure 119. Performance vs Clock Duty Cycle (30 MHz)

Figure 120. Performance vs Clock Duty Cycle (150 MHz)

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Product Folder Links: ADC3421 ADC3422 ADC3423 ADC3424

ADC3421 Datasheet(PDF) 37 Page - Texas Instruments

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