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ADC3421 Datasheet(PDF) 62 Page - Texas Instruments |
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ADC3421 Datasheet(HTML) 62 Page - Texas Instruments |
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62 / 80 page ![]() ADC3421, ADC3422, ADC3423, ADC3424 SBAS673A – JULY 2014 – REVISED OCTOBER 2015 www.ti.com 9.6.1.23 Register 239h (address = 239h) Figure 169. Register 239h 7 6 5 4 3 2 1 0 0 0 0 0 SP1 CHD 0 0 0 W-0h W-0h W-0h W-0h R/W-0h W-0h W-0h W-0h LEGEND: R/W = Read/Write; W = Write only; -n = value after reset Table 32. Register 239h Field Descriptions Bit Field Type Reset Description 7-4 0 W 0h Must write 0. 3 SP1 CHD R/W 0h This bit sets the special mode for best performance on channel D. Always write 1 after reset. 2-0 0 W 0h Must write 0. 9.6.1.24 Register 308h (address = 308h) Figure 170. Register 308h 7 6 5 4 3 2 1 0 HIGH IF MODE<5:4> 0 0 0 0 0 0 W-0h W-0h W-0h W-0h W-0h W-0h R/W-0h W-0h LEGEND: R/W = Read/Write; W = Write only; -n = value after reset Table 33. Register 308h Field Descriptions Bit Field Type Reset Description 7-6 HIGH IF MODE<5:4> R/W 0h Set the HIGH IF MODE[7:0] bits together to FFh. Improves HD3 by a couple of dB for IF > 100 MHz. 5-0 0 W 0h Must write 0. 9.6.1.25 Register 41Dh (address = 41Dh) Figure 171. Register 41Dh 7 6 5 4 3 2 1 0 0 0 0 0 0 0 HIGH IF MODE2 0 W-0h W-0h W-0h W-0h W-0h W-0h R/W-0h W-0h LEGEND: R/W = Read/Write; W = Write only; -n = value after reset Table 34. Register 41Dh Field Descriptions Bit Field Type Reset Description 7-2 0 W 0h Must write 0. 1 HIGH IF MODE2 R/W 0h Set the HIGH IF MODE[7:0] bits together to FFh. Improves HD3 by a couple of dB for IF > 100 MHz. 0 0 W 0h Must write 0. 62 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: ADC3421 ADC3422 ADC3423 ADC3424 |
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