ADC3421 datasheet(67/80 Pages) TI2

67 / 80 page

Frequency (MHz)

12.5

37.5

62.5

-120

-110

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

D201

INP

INM

VCM

1:1

0.1 PF

1:1

22 pF

39 nH

0.1 PF

Device

ADC3421, ADC3422, ADC3423, ADC3424

www.ti.com

SBAS673A – JULY 2014 – REVISED OCTOBER 2015

10.2 Typical Applications

10.2.1 Driving Circuit Design: Low Input Frequencies

Figure 183. Driving Circuit for Low Input Frequencies

10.2.1.1 Design Requirements

For optimum performance, the analog inputs must be driven differentially. An optional 5-

Ω to 15-Ω resistor in

series with each input pin can be kept to damp out ringing caused by package parasitic. The drive circuit may

have to be designed to minimize the impact of kick-back noise generated by sampling switches opening and

closing inside the ADC, as well as ensuring low insertion loss over the desired frequency range and matched

impedance to the source.

10.2.1.2 Detailed Design Procedure

A typical application involving using two back-to-back coupled transformers is illustrated in Figure 183. The circuit

is optimized for low input frequencies. An external R-C-R filter using 50-

Ω resistors and a 22-pF capacitor is used

with the series inductor (39 nH), this combination helps absorb the sampling glitches.

10.2.1.3 Application Curve

Figure 184 shows the performance obtained by using the circuit shown in Figure 183.

SFDR = 97 dBc, SNR = 70.4 dBFS, SINAD = 70.4 dBFS,

THD = 98 dBc, HD2 = 95 dBc, HD3 = 97 dBc

Figure 184. Performance FFT at 10 MHz (Low Input Frequency)

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ADC3421 Datasheet(PDF) 67 Page - Texas Instruments

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