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ADC3421 Datasheet(PDF) 64 Page - Texas Instruments |
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ADC3421 Datasheet(HTML) 64 Page - Texas Instruments |
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64 / 80 page ![]() ADC3421, ADC3422, ADC3423, ADC3424 SBAS673A – JULY 2014 – REVISED OCTOBER 2015 www.ti.com 9.6.1.28 Register 439h (address = 439h) Figure 174. Register 439h 7 6 5 4 3 2 1 0 0 0 0 0 SP1 CHB 0 0 0 W-0h W-0h W-0h W-0h R/W-0h W-0h W-0h W-0h LEGEND: R/W = Read/Write; W = Write only; -n = value after reset Table 37. Register 439h Field Descriptions Bit Field Type Reset Description 7-4 0 W 0h Must write 0. 3 SP1 CHB R/W 0h This bit sets the special mode for best performance on channel B. Always write 1 after reset. 2-0 0 W 0h Must write 0. 9.6.1.29 Register 51Dh (address = 51Dh) Figure 175. Register 51Dh 7 6 5 4 3 2 1 0 0 0 0 0 0 0 HIGH IF MODE3 0 W-0h W-0h W-0h W-0h W-0h W-0h R/W-0h W-0h LEGEND: R/W = Read/Write; W = Write only; -n = value after reset Table 38. Register 51Dh Field Descriptions Bit Field Type Reset Description 7-2 0 W 0h Must write 0. 1 HIGH IF MODE3 R/W 0h Set the HIGH IF MODE[7:0] bits together to FFh. Improves HD3 by a couple of dB for IF > 100 MHz. 0 0 W 0h Must write 0. 9.6.1.30 Register 522h (address = 522h) Figure 176. Register 522h 7 6 5 4 3 2 1 0 0 0 0 0 0 0 DIS CHOP CHC 0 W-0h W-0h W-0h W-0h W-0h W-0h R/W-0h W-0h LEGEND: R/W = Read/Write; W = Write only; -n = value after reset Table 39. Register 522h Field Descriptions Bit Field Type Reset Description 7-2 0 W 0h Must write 0. 1 DIS CHOP CHC R/W 0h This bit disables the chopper. Set this bit to shift the 1/f noise floor at dc. 0 = 1/f noise floor is centered at fS / 2 (default) 1 = Chopper mechanism is disabled; 1/f noise floor is centered at dc 0 0 W 0h Must write 0. 64 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: ADC3421 ADC3422 ADC3423 ADC3424 |
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