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TUSB1210 Datasheet(PDF) 7 Page - Texas Instruments |
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TUSB1210 Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 72 page ![]() 6.4 Thermal Information THERMAL METRIC(1) RHB UNIT (16 Pins) RθJA Junction-to-ambient thermal resistance 34.72 °C/W RθJC(top) Junction-to-case(top) thermal resistance 37.3 °C/W RθJB Junction-to-board thermal resistance 10.3 °C/W ψJT Junction-to-top characterization parameter 0.5 °C/W ψJB Junction-to-board characterization parameter 10.5 °C/W RθJC(bottom) Junction-to-case(bottom) thermal resistance 3.6 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 6.5 Analog I/O Electrical Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER CONDITIONS MIN TYP MAX UNIT CPEN Output Pin VOL CPEN low-level output voltage IOL = 3 mA 0.3 V VOH CPEN high-level output voltage IOH = –3 mA VDD33 – 0.3 V 6.6 Digital I/O Electrical Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT CLOCK VOL Low-level output voltage Frequency = 60 MHz, Load = 10 pF 0.45 V VOH High-level output voltage VDDIO - 0.45 V STP, DIR, NXT, DATA0 to DATA7 VOL Low-level output voltage Frequency = 30 MHz, Load = 10 pF 0.45 V VOH High-level output voltage VDDIO - 0.45 V 6.7 Digital IO Pins (Non-ULPI) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT CS, CFG, RESETB Input Pins VIL Maximum low-level input voltage 0.35 x VDDIO V VIH Minimum high-level input voltage 0.65 x VDDIO V RESETB Input Pin Timing Spec tw(POR) Internal power-on reset pulse width 0.2 μs tw(RESET) External RESETB pulse width Applied to external RESETB pin when CLOCK is toggling. 8 CLOCK cycles www.ti.com TUSB1210 SLLSE09J – NOVEMBER 2009 – REVISED JULY 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: TUSB1210 |
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