CC2564MODACMOG datasheet(12/68 Pages) TI2

12 / 68 page

CC2564MODN, CC2564MODA

SWRS160E – FEBRUARY 2014 – REVISED JANUARY 2017

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Product Folder Links: CC2564MODN CC2564MODA

Specifications

(1)

The terms None or Asserted can imply any of the following conditions: directly pulled to ground or driven low, pulled to ground through a

pulldown resistor, or left NC or floating (high-impedance output stage).

4.7.1.3

Power Supplies and Shutdown – Static States

The nSHUTD signal puts the device in ultra-low power mode and performs an internal reset to the device.

The rise time for nSHUTD must not exceed 20 µs; nSHUTD must be low for a minimum of 5 ms.

To prevent conflicts with external signals, all I/O pins are set to the high-impedance (Hi-Z) state during

shutdown and power up of the device. The internal pull resistors are enabled on each I/O pin, as

described in Section 3.2. Table 4-1 describes the static operation states.

Table 4-1. Power Modes

VDD_IN (1)

VDD_IO(1)

nSHUTD(1)

PM_MODE

COMMENTS

None

Asserted

Shutdown

I/O state is undefined. I/O voltages are

not allowed on nonfail-safe pins.

None

Deasserted

Not allowed

I/O state is undefined. I/O voltages are

not allowed on nonfail-safe pins.

None

Present

Asserted

Shutdown

I/Os are defined as tri-state with

internal pullup or pulldown enabled.

None

Present

Deasserted

Not allowed

I/O state is undefined. I/O voltages are

not allowed on nonfail-safe pins.

Present

None

Asserted

Shutdown

I/O state is undefined.

Present

None

Deasserted

Not allowed

I/O state is undefined. I/O voltages are

not allowed on nonfail-safe pins.

Present

Asserted

Shutdown

I/Os are defined as tri-state with

internal pullup or pulldown enabled.

Present

Deasserted

Active

See Section 4.7.1.4

(1)

I = input, O = output, Z = Hi-Z, — = no pull, PU = pullup, PD = pulldown, H = high, L = low

4.7.1.4

I/O States in Various Power Modes

CAUTION

Some device I/Os are not fail-safe (see Section 3.2). Fail-safe means that the

pins do not draw current from an external voltage applied to the pin when I/O

power is not supplied to the device. External voltages are not allowed on these

I/O pins when the I/O supply voltage is not supplied because of possible

damage to the device.

Table 4-2 lists the I/O states in various power modes.

Table 4-2. I/O States in Various Power Modes

I/O NAME

SHUT DOWN(1)

DEFAULT ACTIVE(1)

DEEP SLEEP (1)

I/O State

Pull

I/O State

Pull

I/O State

Pull

HCI_RX

HCI_TX

O-H

HCI_RTS

O-H

HCI_CTS

AUD_CLK

AUD_FSYNC

AUD_IN

AUD_OUT

TX_DBG

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