DA9213 datasheet(29/62 Pages) RENESAS

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DA9213, DA9214, DA9215 Datasheet

R16DS0598EJ0361 Rev.03.61

Nov 03, 2025

CFR0011-120-00

Page 29

5.2

Ports Description

This section describes the functionality of each input / output port.

5.2.1

VDDIO

VDDIO is an independent IO supply rail input to DA9213, DA9214, and DA9215 that can be assigned to the

power manager interface and to the GPIOs (see control PM_IF_V and GPI_V). The rail assignment determines

the IO voltage levels and logical thresholds (see also the Digital I/O Characteristics in Table 8).

An integrated under-voltage lockout circuit for the VDDIO prevents internal errors by disabling the I2C

communication when the voltage drops below VULO_IO. In that case the buck converters are also disabled and

cannot be re-enabled (even via input port) until the VDDIO under-voltage condition has been resolved. At the

exit of the VDDIO under-voltage condition an event E_UVLO_IO is generated and the nIRQ line is driven active

if the event is not masked.

The VDDIO under-voltage circuit monitors voltages relative to a nominal voltage of 1.8 V. If a different rail

voltage is being used, the under-voltage circuit can be disabled via UVLO_IO_DIS.

Note that the maximum speed at 4-WIRE interface is only available if the selected supply rail is greater than

1.6 V.

5.2.2

IC_EN

IC_EN is a general enable signal for DA9213, DA9214, and DA9215, turning on and off the internal circuitry (for

example, the reference, the digital core, and so on.). Correct control of this port has a direct impact on the

quiescent current of the whole application. A low level of IC_EN allows the device to reach the minimum

quiescent current. The voltage at this pin is continuously sensed by a dedicated analog circuit.

The host processor will be allowed to start the communication with DA9213, DA9214, and DA9215 through the

Control Interface and, for example to turn on the buck converters, a delay time of tEN after assertion of the IC_EN

pin. If the bucks are enabled via OTP (see BUCKA_EN and BUCKB_EN controls), they will start up

automatically after assertion of IC_EN.

The IC_EN activation threshold is defined with a built-in hysteresis to avoid glitching transitions that take place

with unstable rising or falling edges.

5.2.3

nIRQ

The nIRQ port indicates that an interrupt causing event has occurred and that the event/status information is

available in the related registers. The nIRQ is an output signal that can either be push pull or open drain

(selected via IRQ_TYPE). If an active high IRQ signal is required, it can be achieved by asserting control

IRQ_LEVEL (recommended for push-pull mode).

Examples of this type of information can be critical temperature and voltage, fault conditions, status changes at

GPI ports, and so forth. The event registers hold information about the events that have occurred. Events are

triggered by a status change at the monitored signals. When an event bit is set, the nIRQ signal is asserted

unless this interrupt is masked by a bit in the IRQ mask register. The nIRQ will not be released until all event

registers with asserted bits have been read and cleared. New events that occur during reading an event register

are held until the event register has been cleared, ensuring that the host processor does not miss them.

5.2.4

GPIO Extender

DA9213, DA9214, and DA9215 include a GPIO extender that offers up to five 5 V-tolerant general purpose

input/output ports. Each port is controlled via registers from the host processor.

The GPIO3 and GPI4 ports are pin-shared with the 4-WIRE Control Interface. For instance, if GPIO3_PIN = 01,

GPI4_PIN = 01 (Interface selected), the GPIO3 and GPI4 ports will be exclusively dedicated to output and chip

select signaling for 4-WIRE purposes. If the alternative function is selected, all GPIOs configuration as per

registers 0x58 to 0x5A and 0x145 will be ignored.

GPIs are supplied from the internal rail VDDCORE or VDDIO (selected via GPI_V) and can be configured to be

active high or active low (selected via GPIOx_TYPE). The input signals can be debounced or directly change the

state of the assigned status register GPIx to high or low, according to the setting of GPIOx_MODE. The

debouncing time is configurable via control DEBOUNCE (10 ms default).

DA9213 Datasheet(PDF) 29 Page - Renesas Technology Corp

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