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DA9213 Datasheet(PDF) 17 Page - Renesas Technology Corp

Part # DA9213
Description  Multi-Phase 5 A/Phase DC-DC Buck Converter
PDF  62 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

DA9213 Datasheet(HTML) 17 Page - Renesas Technology Corp

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DA9213, DA9214, DA9215 Datasheet
R16DS0598EJ0361 Rev.03.61
Nov 03, 2025
CFR0011-120-00
Page 17
Parameter
Description
Conditions
Min
Typ
Max
Unit
(4-WIRE Mode)
HIGH level input voltage
VIL_4WIRE
SK, nCS, SI
(4-WIRE Mode)
LOW level input voltage
0.3*VDDIO
V
VOH
GPO2-3, SO (4-WIRE mode)
HIGH level output voltage
Push-pull mode
at 1 mA
VDDIO
≥ 1.5 V
0.8*VDDIO
V
VOL1
GPO2-3, SDA (2-WIRE
mode) SO (4-WIRE mode)
LOW level output voltage at
IOL = 1 mA
0.3
V
VOL3
SDA (2-WIRE Mode)
LOW level output voltage at
IOL = 3 mA
0.24
V
VOL20
SDA (2-WIRE Mode)
LOW level output voltage at
IOL = 20 mA
0.4
V
CIN
CLK, SDA
(2-WIRE Mode)
input capacitance
2.5
10
pF
tSP
CLK, SDA
(2-WIRE Mode)
spike suppression pulse
width
Fast/Fast+ mode
High Speed mode
0
0
50
10
ns
tfDA
Fall time of SDA signal
(2-WIRE Mode)
Fast at CB < 550 pF
HS at 10 < CB < 100 pF
HS at CB < 400 pF
20+0.1CB
10
20
120
80
160
ns
Unless otherwise noted, the following is valid for TA = -40 °C to +85 ºC
Table 9. 2-WIRE Control Bus Characteristics
Parameter
Description
Conditions
Min
Typ
Max
Unit
tBUF
Bus free time from STOP to
START condition
0.5
µs
CB
Bus line capacitive load
150
pF
Standard/Fast/Fast+ Mode
fSCL
Clock frequency
At pin SCL
0
Note 1
1000
kHz
tSU_STA
START condition set-up time
0.26
µs
tH_STA
START condition hold time
0.26
µs
tW_CL
Clock LOW duration
0.5
µs
tW_CH
Clock HIGH duration
0.26
µs
tR
Rise time
Input requirement. At
pin CLK and DATA
1000
ns
tF
Fall time
Input requirement. At
pin CLK and DATA
300
ns



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