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F24 Datasheet(PDF) 141 Page - Renesas Technology Corp |
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F24 Datasheet(HTML) 141 Page - Renesas Technology Corp |
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141 / 210 page ![]() RL78/F23, F24 4. ELECTRICAL SPECIFICATIONS (GRADE 4) R01DS0446EJ0120 Rev.1.20 Page 141 of 207 Dec 31, 2025 4.6.5 LVD Circuit Characteristics (1) LVD detection voltage of interrupt mode or reset mode (TA = -40 to +125 °C, VPDR ≤ EVDD0 = EVDD1 = VDD ≤ 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit Detection voltage Supply voltage level VLVD0 Power supply rise time 4.62 4.74 4.94 V Power supply fall time 4.52 4.64 4.84 V VLVD1 Power supply rise time 4.50 4.62 4.82 V Power supply fall time 4.40 4.52 4.71 V VLVD2 Power supply rise time 4.30 4.42 4.61 V Power supply fall time 4.21 4.32 4.51 V VLVD3 Power supply rise time 3.13 3.22 3.39 V Power supply fall time 3.07 3.15 3.31 V VLVD4 Power supply rise time 2.95 3.02 3.17 V Power supply fall time 2.89 2.96 3.09 V VLVD5 Power supply rise time 2.74 2.81 2.95 V Power supply fall time 2.68 Note 2.75 2.88 V Minimum pulse width tLW 300 µs Detection delay time tLD 300 µs Note The minimum value exceeds below the lower limit operation voltage (2.7 V), however, in reset mode, normal operation (same behavior when VDD = 2.7 V) is possible until a reset is effected at the power supply falling time. (2) LVD detection voltage of interrupt and reset mode (TA = -40 to +125 °C, VPDR ≤ EVDD0 = EVDD1 = VDD ≤ 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit Interrupt and reset mode VLVD5 VPOC2, VPOC1, VPOC0 = 0, 0, 1 Note 1, falling reset voltage: 2.75 V 2.68 Note 2 2.75 2.88 V VLVD2 LVIS1, LVIS0 = 0, 0 Rising release reset voltage 4.30 4.42 4.61 V Falling interrupt voltage 4.21 4.32 4.51 V VLVD5 VPOC2, VPOC1, VPOC0 = 0, 1, 0 Note 1, falling reset voltage: 2.75 V 2.68 Note 2 2.75 2.88 V VLVD1 LVIS1, LVIS0 = 0, 0 Rising release reset voltage 4.50 4.62 4.82 V Falling interrupt voltage 4.40 4.52 4.71 V VLVD5 VPOC2, VPOC1, VPOC0 = 0, 1, 1 Note 1, falling reset voltage: 2.75 V 2.68 Note 2 2.75 2.88 V VLVD3 LVIS1, LVIS0 = 0, 1 Rising release reset voltage 3.13 3.22 3.39 V Falling interrupt voltage 3.07 3.15 3.31 V VLVD0 LVIS1, LVIS0 = 0, 0 Rising release reset voltage 4.62 4.74 4.94 V Falling interrupt voltage 4.52 4.64 4.84 V Notes 1. These values indicate setting values of option bytes. 2. The minimum value exceeds below the lower limit operation voltage (2.7 V), however, in reset mode, normal operation (same behavior when VDD = 2.7 V) is possible until a reset is effected at the power supply falling time. |
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