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LAN9313 Datasheet(PDF) 240 Page - SMSC Corporation

Part # LAN9313
Description  Three Port 10/100 Managed Ethernet Switch with MII
PDF  398 Pages
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Manufacturer  SMSC [SMSC Corporation]
Direct Link  http://www.smsc.com
Logo SMSC - SMSC Corporation

LAN9313 Datasheet(HTML) 240 Page - SMSC Corporation

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Three Port 10/100 Managed Ethernet Switch with MII
Datasheet
Revision 1.2 (04-08-08)
240
SMSC LAN9313/LAN9313i
DATASHEET
Note 13.55
The Pause and Asymmetric Pause bits are loaded into the PHY registers by the EEPROM
Loader.
Note 13.56
The default value of this bit is determined by the Manual Flow Control Enable Strap
(manual_FC_strap_x). When the Manual Flow Control Enable Strap is 0, this bit defaults
to 1 (symmetric pause advertised). When the Manual Flow Control Enable Strap is 1, this
bit defaults to 0 (symmetric pause not advertised). Configuration strap values are latched
upon the de-assertion of a chip-level reset as described in Section 4.2.4, "Configuration
Straps," on page 45. Refer to Section 4.2.4, "Configuration Straps," on page 45 for
configuration strap definitions.
Note 13.57
The default value of this bit is determined by the logical OR of the Auto-Negotiation strap
(autoneg_strap_x) with the logical AND of the negated speed select strap (speed_strap_x)
and (duplex_strap_x). Table 13.8 defines the default behavior of this bit. Configuration
strap values are latched upon the de-assertion of a chip-level reset as described in Section
4.2.4, "Configuration Straps," on page 45. Refer to Section 4.2.4, "Configuration Straps,"
on page 45 for configuration strap definitions.
Note 13.58
The default value of this bit is determined by the logical OR of the Auto-Negotiation strap
(autoneg_strap_x) and the negated speed strap (speed_strap_x). Table 13.9 defines the
default behavior of this bit. Configuration strap values are latched upon the de-assertion
of a chip-level reset as described in Section 4.2.4, "Configuration Straps," on page 45.
Refer to Section 4.2.4, "Configuration Straps," on page 45 for configuration strap
definitions.
6
10BASE-T Full Duplex
This bit determines the advertised 10BASE-T full duplex capability.
0: 10BASE-T full duplex ability not advertised
1: 10BASE-T full duplex ability advertised
R/W
Note 13.57
Table 13.8
5
10BASE-T Half Duplex
This bit determines the advertised 10BASE-T half duplex capability.
0: 10BASE-T half duplex ability not advertised
1: 10BASE-T half duplex ability advertised
R/W
Note 13.58
Table 13.9
4:0
Selector Field
This field identifies the type of message being sent by Auto-Negotiation.
00001: IEEE 802.3
R/W
00001b
Table 13.8 10BASE-T Full Duplex Advertisement Default Value
autoneg_strap_x
speed_strap_x
duplex_strap_x
Default 10BASE-T Full Duplex (Bit 6) Value
00
0
0
00
1
1
01
0
0
01
1
0
10
0
1
10
1
1
11
0
1
11
1
1
BITS
DESCRIPTION
TYPE
DEFAULT



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