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C511 Datasheet(PDF) 100 Page - Siemens Semiconductor Group |
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C511 Datasheet(HTML) 100 Page - Siemens Semiconductor Group |
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100 / 128 page ![]() Power Saving Mode Semiconductor Group 8-4 8.2 Power-Down Mode In the power-down mode, the on-chip oscillator is stopped. Therefore all functions are stopped; only the contents of the on-chip RAM and the SFR’s are maintained. The port pins controlled by their port latches output the values that are held by their SFR’s. The port pins which serve the alternate output functions show the values they had at the end of the last cycle of the instruction which initiated the power-down mode. ALE and PSEN hold at logic low level (see table 8-1). The power-down mode is entered by setting the PDE bit. Because PCON is not a bit-addressable register, the setting of the bit has to be obtained by byte-handling instructions, e.g. by: ORL PCON,#00000010B ;Set PDE bit The instruction that sets bit PDE is the last instruction executed before going into power-down mode. The only way to exit from power-down mode is a hardware reset. This reset will redefine all SFR’s, but will not change the contents of the internal RAM. In the power-down mode, V CC can be reduced up to a minimum of 2 V to minimize power consumption. It must be ensured, however, that V CC is not reduced before the power-down mode is invoked, and that V CC is restored to its normal operating level, before the power-down mode is terminated. The reset signal that terminates the power-down mode also restarts the oscillator. The reset should not be activated before V CC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize (as with power-on reset). |
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