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C167CS Datasheet(PDF) 296 Page - Infineon Technologies AG |
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C167CS Datasheet(HTML) 296 Page - Infineon Technologies AG |
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296 / 517 page  C167CS Derivatives The High-Speed Synchronous Serial Interface User’s Manual 12-13 V2.0, 2000-07 12.5 Baud Rate Generation The serial channel SSC has its own dedicated 16-bit baud rate generator with 16-bit reload capability, permitting baud rate generation independent from the timers. The baud rate generator is clocked with the CPU clock divided by 2 ( fCPU / 2). The timer is counting downwards and can be started or stopped through the global enable bit SSCEN in register SSCCON. Register SSCBR is the dual-function Baud Rate Generator/Reload register. Reading SSCBR, while the SSC is enabled, returns the content of the timer. Reading SSCBR, while the SSC is disabled, returns the programmed reload value. In this mode the desired reload value can be written to SSCBR. Note: Never write to SSCBR, while the SSC is enabled. The formulas below calculate either the resulting baud rate for a given reload value, or the required reload value for a given baudrate: <SSCBR> represents the content of the reload register, taken as an unsigned 16-bit integer. Table 12-2 list some possible baud rates together with the required reload values and the resulting bit times, for different CPU clock frequencies. Table 12-2 SSC Bit-Time Calculation Bit-time for fCPU = … Reload Val. (SSCBR) 16 MHz 20 MHz 25 MHz 33 MHz Reserved. SSCBR must be > 0. 0000H 250 ns 200 ns 160 ns 121 ns 0001H 375 ns 300 ns 240 ns 182 ns 0002H 500 ns 400 ns 320 ns 242 ns 0003H 625 ns 500 ns 400 ns 303 ns 0004H 1.00 µs 800 ns 640 ns 485 ns 0007H 1.25 µs1 µs 800 ns 606 ns 0009H 10 µs8 µs6.4 µs4.8 µs 004FH 12.5 µs10 µs8 µs6.1 µs 0063H 15.6 µs12.5 µs10 µs7.6 µs 007CH 20.6 µs16.5 µs13.2 µs10 µs00A4 H BSSC = fCPU 2 × (<SSCBR> + 1) SSCBR = ( fCPU 2 × Baudrate SSC ) – 1 , |
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