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C167CS Datasheet(PDF) 330 Page - Infineon Technologies AG

Part # C167CS
Description  16-Bit Single-Chip Microcontroller
PDF  517 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

C167CS Datasheet(HTML) 330 Page - Infineon Technologies AG

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C167CS
Derivatives
The Capture/Compare Units
User’s Manual
16-12
V2.0, 2000-07
Each of the registers CCx may be individually programmed for capture mode or one of
4 different compare modes, and may be allocated individually to one of the two timers of
the respective CAPCOM unit (T0 or T1, and T7 or T8, respectively). A special
combination of compare modes additionally allows the implementation of a ‘double-
register’ compare mode. When capture or compare operation is disabled for one of the
CCx registers, it may be used for general purpose variable storage.
The detailed discussion of the capture and compare modes is valid for all the capture/
compare channels, so registers, bits and pins are only referenced by the placeholder ‘x’.
Note: A capture or compare event on channel 31 may be used to trigger a channel
injection on the C167CS’s A/D converter if enabled.
Table 16-5
Selection of Capture Modes and Compare Modes
CCMODx
Selected Operating Mode
0 0 0
Disable Capture and Compare Modes
The respective CAPCOM register may be used for general variable storage.
0 0 1
Capture on Positive Transition (Rising Edge) at Pin CCxIO
0 1 0
Capture on Negative Transition (Falling Edge) at Pin CCxIO
0 1 1
Capture on Positive and Negative Transition (Both Edges) at Pin CCxIO
1 0 0
Compare Mode 0:
Interrupt Only
Several interrupts per timer period; Enables double-register compare mode
for registers CC8 … CC15 and CC24 … CC31.
1 0 1
Compare Mode 1:
Toggle Output Pin on each Match
Several compare events per timer period; This mode is required for double-
register compare mode for registers CC0 … CC7 and CC16 … CC23.
1 1 0
Compare Mode 2:
Interrupt Only
Only one interrupt per timer period.
1 1 1
Compare Mode 3:
Set Output Pin on each Match
Reset output pin on each timer overflow; Only one interrupt per timer period.



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