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C167CS Datasheet(PDF) 327 Page - Infineon Technologies AG |
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C167CS Datasheet(HTML) 327 Page - Infineon Technologies AG |
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327 / 517 page  C167CS Derivatives The Capture/Compare Units User’s Manual 16-9 V2.0, 2000-07 16.2 CAPCOM Unit Timer Interrupts Upon a timer overflow the corresponding timer interrupt request flag TxIR for the respective timer will be set. This flag can be used to generate an interrupt or trigger a PEC service request, when enabled by the respective interrupt enable bit TxIE. Each timer has its own bitaddressable interrupt control register (TxIC) and its own interrupt vector (TxINT). The organization of the interrupt control registers TxIC is identical with the other interrupt control registers. Note: Please refer to the general Interrupt Control Register description for an explanation of the control fields. T0IC CAPCOM T0 Intr. Ctrl. Reg. SFR (FF9CH/CEH) Reset Value: - - 00H 15 14 13 12 11 10 9876 543210 T0IR T0IE ILVL GLVL - - - - - - - - rwh rw rw rw T1IC CAPCOM T1 Intr. Ctrl. Reg. SFR (FF9EH/CFH) Reset Value: - - 00H 15 14 13 12 11 10 9876 543210 T1IR T1IE ILVL GLVL - - - - - - - - rwh rw rw rw T7IC CAPCOM T7 Intr. Ctrl. Reg. ESFR (F17AH/BEH) Reset Value: - - 00H 15 14 13 12 11 10 98765 43210 T7IR T7IE ILVL GLVL - - - - - - - - rwh rw rw rw T8IC CAPCOM T8 Intr. Ctrl. Reg. ESFR (F17CH/BFH) Reset Value: - - 00H 15 14 13 12 11 10 9876 543210 T8IR T8IE ILVL GLVL - - - - - - - - rwh rw rw rw |
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