| Electronic Components Datasheet Search |
|
C167CS Datasheet(PDF) 324 Page - Infineon Technologies AG |
|
|
|||||||||||||||||||||||||||||
C167CS Datasheet(HTML) 324 Page - Infineon Technologies AG |
|
324 / 517 page ![]() C167CS Derivatives The Capture/Compare Units User’s Manual 16-6 V2.0, 2000-07 The timer run flags T0R, T1R, T7R, and T8R allow for enabling and disabling the timers. The following description of the timer modes and operation always applies to the enabled state of the timers, i.e. the respective run flag is assumed to be set to ‘1’. In all modes, the timers are always counting upward. The current timer values are accessible for the CPU in the timer registers Tx, which are non-bitaddressable SFRs. When the CPU writes to a register Tx in the state immediately before the respective timer increment or reload is to be performed, the CPU write operation has priority and the increment or reload is disabled to guarantee correct timer operation. Timer Mode The bits TxM in SFRs T01CON and T78CON select between timer or counter mode for the respective timer. In timer mode (TxM = ‘0’), the input clock for a timer is derived from the internal CPU clock divided by a programmable prescaler. The different options for the prescaler are selected separately for each timer by the bit fields TxI. The input frequencies fTx for Tx are determined as a function of the CPU clock as follows, where <TxI> represents the contents of the bit field TxI: When a timer overflows from FFFFH to 0000H it is reloaded with the value stored in its respective reload register TxREL. The reload value determines the period PTx between two consecutive overflows of Tx as follows: After a timer has been started by setting its run flag (TxR) to ‘1’, the first increment will occur within the time interval which is defined by the selected timer resolution. All further increments occur exactly after the time defined by the timer resolution. When both timers of a CAPCOM unit are to be incremented or reloaded at the same time T0 is always serviced one CPU clock before T1, T7 before T8, respectively. The timer input frequencies, resolution and periods which result from the selected prescaler option in TxI when using a certain CPU clock are listed in Table 16-2 - Table 16-4. The numbers for the timer periods are based on a reload value of 0000H. Note that some numbers may be rounded to 3 significant digits. fTx = fCPU 2(<TxI> + 3) PTx = fCPU (216 – <TxREL>) × 2(<TxI> + 3) |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |