C167CS datasheet(336/517 Pages) INFINEON

336 / 517 page

C167CS

Derivatives

The Capture/Compare Units

User’s Manual

16-18

V2.0, 2000-07

Compare Mode 3

Compare mode 3 is selected for register CCx by setting bit field CCMODx of the

corresponding mode control register to ‘111B’. In compare mode 3 only one compare

event will be generated per timer period.

When the first match within the timer period is detected the interrupt request flag CCxIR

is set to ‘1’ and also the output pin CCxIO (alternate port function) will be set to ‘1’. The

pin will be reset to ‘0’, when the allocated timer overflows.

If a match was found for register CCx in this mode, all further compare events during the

current timer period are disabled for CCx until the corresponding timer overflows. If, after

a match was detected, the compare register is reloaded with a new value, this value will

not become effective until the next timer period.

In order to use the respective port pin as compare signal output pin CCxIO for compare

corresponding direction control bit must be set to ‘1’. With this configuration, the initial

state of the output signal can be programmed or its state can be modified at any time by

writing to the port output latch.

In compare mode 3 the port latch is set upon a compare event and cleared upon a timer

overflow (see Figure 16-9).

However, when compare value and reload value for a channel are equal the respective

interrupt requests will be generated, only the output signal is not changed (set and clear

would coincide in this case).

Note: If the port output latch is written to by software at the same time it would be altered

by a compare event, the software write will have priority. In this case the hardware-

triggered change will not become effective.

C167CS Datasheet(PDF) 336 Page - Infineon Technologies AG