C167CS datasheet(387/517 Pages) INFINEON

387 / 517 page

C167CS

Derivatives

The On-Chip CAN Interface

User’s Manual

19-15

V2.0, 2000-07

Bit Timing Example for High Baudrate

This example makes the following assumptions:

• XCLK frequency = 20 MHz

• BRP = 00, CPS = 0

• Baudrate = 1 Mbit/sec

100 ns

= 2

× t

XCLK

bus driver delay

50 ns

receiver circuit delay

30 ns

bus line (40 m) delay

220 ns

tProp

600 ns

= 6

× t

tSJW

100 ns

= 1

× t

tTSeg1

700 ns

tProp + tSJW

tTSeg2

200 ns

Information Processing Time

tSync

100 ns

= 1

× t

tBit

1000 ns =

tSync + tTSeg1 + tTSeg2

tolerance for

tXCLK

0.39%

Bit Timing Example for Low Baudrate

This example makes the following assumptions:

• XCLK frequency = 4 MHz

• BRP = 01, CPS = 0

• Baudrate = 100 kbit/sec

µs= 4 × t

XCLK

bus driver delay

200 ns

receiver circuit delay

80 ns

bus line (40 m) delay

220 ns

tProp

µs= 1 × t

tSJW

µs= 4 × t

tTSeg1

µs= t

Prop + tSJW

tTSeg2

µs= Information Processing Time + 2 × t

tSync

µs= 1 × t

tBit

µs= t

Sync + tTSeg1 + tTSeg2

tolerance for

fXCLK

1.58%

min PB1 PB2

()

bit time

PB2

–

()

----------------------------------------------------------------

0,1

µs

213

µs0,2µs

–

()

-----------------------------------------------------------

min PB1 PB2

()

bit time

PB2

–

()

----------------------------------------------------------------

µs

213

µs4µs

–

()

---------------------------------------------------------

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