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C167CS Datasheet(PDF) 209 Page - Infineon Technologies AG

Part # C167CS
Description  16-Bit Single-Chip Microcontroller
PDF  517 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

C167CS Datasheet(HTML) 209 Page - Infineon Technologies AG

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C167CS
Derivatives
The External Bus Interface
User’s Manual
9-21
V2.0, 2000-07
Note: Register SYSCON cannot be changed after execution of the EINIT instruction.
Bit SGTDIS controls the correct stack operation (push/pop of CSP or not) during
traps and interrupts.
The layout of the BUSCON registers and ADDRSEL registers is identical (respectively).
Registers BUSCON4 … BUSCON1, which control the selected address windows, are
completely under software control, while register BUSCON0, which e.g. is also used for
the very first code access after reset, is partly controlled by hardware, i.e. it is initialized
via PORT0 during the reset sequence. This hardware control allows to define an
appropriate external bus for systems, where no internal program memory is provided.
CSCFG
Chip Select Configuration Control (Cleared after reset)
0:
Latched CS mode. The CS signals are latched internally
and driven to the (enabled) port pins synchronously.
1:
Unlatched CS mode. The CS signals are directly derived from
the address and driven to the (enabled) port pins.
WRCFG
Write Configuration Control (Configured via pin P0H.0 upon a reset)
0:
Pins WR and BHE retain their normal function
1:
Pin WR acts as WRL, pin BHE acts as WRH
CLKEN
System Clock Output Enable (CLKOUT, cleared after reset)
0:
CLKOUT disabled: pin may be used for FOUT or gen. purpose IO
1:
CLKOUT enabled: pin outputs the system clock signal
BYTDIS
Disable/Enable Control for Pin BHE (Set according to data bus width)
0:
Pin BHE enabled
1:
Pin BHE disabled, pin may be used for general purpose IO
ROMEN
Internal ROM Enable (Set according to pin EA during reset)
0:
Internal program memory disabled,
accesses to the ROM area use the external bus
1:
Internal program memory enabled
SGTDIS
Segmentation Disable/Enable Control (Cleared after reset)
0:
Segmentation enabled
(CSP is saved/restored during interrupt entry/exit)
1:
Segmentation disabled (Only IP is saved/restored)
ROMS1
Internal ROM Mapping
0:
Internal ROM area mapped to segment 0 (00’0000H … 00’7FFFH)
1:
Internal ROM area mapped to segment 1 (01’0000H … 01’7FFFH)
STKSZ
System Stack Size
Selects the size of the system stack (in the internal RAM)
from 32 to 1024 words
Bit
Function



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