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C167CS Datasheet(PDF) 211 Page - Infineon Technologies AG

Part # C167CS
Description  16-Bit Single-Chip Microcontroller
PDF  517 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

C167CS Datasheet(HTML) 211 Page - Infineon Technologies AG

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C167CS
Derivatives
The External Bus Interface
User’s Manual
9-23
V2.0, 2000-07
Bit
Function
MCTC
Memory Cycle Time Control (Number of memory cycle time wait states)
0000: 15 waitstates
…
(Number = 15 – <MCTC>)
1111: No waitstates
Note: The definition of bitfield MCTCx changes if RDYENx = ‘1’
(see Chapter 9.4)
RWDCx
Read/Write Delay Control for BUSCONx
0:
With rd/wr delay: activate command 1 TCL after falling edge of ALE
1:
No rd/wr delay: activate command with falling edge of ALE
MTTCx
Memory Tristate Time Control
0:
1 waitstate
1:
No waitstate
BTYP
External Bus Configuration
00:
8-bit Demultiplexed Bus
01:
8-bit Multiplexed Bus
10:
16-bit Demultiplexed Bus
11:
16-bit Multiplexed Bus
Note: For BUSCON0 BTYP is defined via PORT0 during reset.
EWENx
Early Write Enable
0:
Normal WR signal
1:
Early write: WR signal is deactivated and write data is tristated one
TCL earlier
ALECTLx
ALE Lengthening Control
0:
Normal ALE signal
1:
Lengthened ALE signal
BUSACTx
Bus Active Control
0:
External bus disabled
1:
External bus enabled within respective address window (ADDRSEL)
BSWCx
BUSCON Switch Control
0:
Address windows are switched immediately
1:
A tristate waitstate is inserted if the next bus cycle accesses a
different address window than the one controlled by this BUSCON
register.1)
RDYENx
READY Input Enable
0:
External bus cycle is controlled by bit field MCTC only
1:
External bus cycle is controlled by the READY input signal



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