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C167CS Datasheet(PDF) 215 Page - Infineon Technologies AG

Part # C167CS
Description  16-Bit Single-Chip Microcontroller
PDF  517 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

C167CS Datasheet(HTML) 215 Page - Infineon Technologies AG

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C167CS
Derivatives
The External Bus Interface
User’s Manual
9-27
V2.0, 2000-07
Address Window Arbitration
The address windows that can be defined within the C167CS’s address space may
partly overlap each other. Thus e.g. small areas may be cut out of bigger windows in
order to effectively utilize external resources, especially within segment 0.
For each access the EBC compares the current address with all address select registers
(programmable ADDRSELx and hardwired XADRSx). This comparison is done in four
levels.
Priority 1: The hardwired XADRSx registers are evaluated first. A match with one of
these registers directs the access to the respective X-Peripheral using the
corresponding XBCONx register and ignoring all other ADDRSELx regis-
ters.
Priority 2: Registers ADDRSEL2 and ADDRSEL4 are evaluated before ADDRSEL1
and ADDRSEL3, respectively. A match with one of these registers directs
the access to the respective external area using the corresponding BUS-
CONx register and ignoring registers ADDRSEL1/3 (see Figure 9-11).
Priority 3: A match with registers ADDRSEL1 or ADDRSEL3 directs the access to the
respective external area using the corresponding BUSCONx register.
Priority 4: If there is no match with any XADRSx or ADDRSELx register the access to
the external bus uses register BUSCON0.
Figure 9-11
Address Window Arbitration
Note: Only the indicated overlaps are defined. All other overlaps lead to erroneous bus
cycles. E.g. ADDRSEL4 may not overlap ADDRSEL2 or ADDRSEL1. The
hardwired XADRSx registers are defined non-overlapping.
MCA04368
XBCON0
BUSCON2
BUSCON1
BUSCON0
BUSCON4
BUSCON3
Active Window
Inactive Window



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