C167CS datasheet(219/517 Pages) INFINEON

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C167CS

Derivatives

The External Bus Interface

User’s Manual

9-31

V2.0, 2000-07

9.7

External Bus Arbitration

In embedded systems it may be efficient to share external resources like memory banks

or peripheral devices among more than one microcontroller or processor. The C167CS

supports this approach with the possibility to arbitrate the access to its external bus, i.e.

to the external resources. Several bus masters can therefore use the same set of

resources, resulting in compact, though powerful systems.

Note: Sharing external resources is useful if these resources are used to a limited

amount only. The performance of a bus master which relies on these external

resources to a great extent (e.g. external code) will be reduced by the bandwidth

used by the other masters.

Bus arbitration uses three control signals (HOLD, HLDA/BGR, BREQ) and can be

enabled and disabled via software (PSW.HLDEN), e.g. in order to protect time-critical

code sections from being suspended by other bus masters. A bus arbiter logic can be

designed to determine which of the bus masters controls the external system at a given

time.

Using the specific master and slave modes for bus arbitration saves external glue logic

(bus arbiter) when connecting two devices of the C166 Family.

Note: Bus arbitration does not work if there is no clock signal for the EBC, i.e. during Idle

mode and Powerdown mode.

Signals and Control

The upper three pins of Port 6 are used for the bus arbitration interface. Table 9-8

summarizes the functions of these interface lines.

The external bus arbitration is enabled by setting bit HLDEN in register PSW to ‘1’. In

this case the three bus arbitration pins HOLD, HLDA and BREQ are automatically

controlled by the EBC independent of their IO configuration.

Bit HLDEN may be cleared during the execution of program sequences, where the

external resources are required but cannot be shared with other bus masters, or during

sequences which need to access on-chip XBUS resources but which shall not be

interrupted by hold states. In this case the C167CS will not answer to HOLD requests

from other external masters. If HLDEN is cleared while the C167CS is in Hold State

(code execution from internal RAM/ROM) this Hold State is left only after HOLD has

been deactivated again. I.e. in this case the current Hold State continues and only the

next HOLD request is not answered.

Note: The pins HOLD, HLDA and BREQ keep their alternate function (bus arbitration)

even after the arbitration mechanism has been switched off by clearing HLDEN.

All three pins are used for bus arbitration after bit HLDEN was set once.

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