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C167CS Datasheet(PDF) 223 Page - Infineon Technologies AG |
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C167CS Datasheet(HTML) 223 Page - Infineon Technologies AG |
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223 / 517 page ![]() C167CS Derivatives The External Bus Interface User’s Manual 9-35 V2.0, 2000-07 Connecting Bus Masters When multiple bus masters (C167CSs or other masters) shall share external resources a bus arbiter is required that determines the currently active bus master and also enables a C167CS which has surrendered its bus interface to regain control of it in case it must access the shared external resources. The structure of this bus arbiter defines the degree of control the C167CS has over the external bus system. Whenever the C167CS has released the bus, there is no way of actively regaining control of it, besides the activation of the BREQ signal. In any case the C167CS must wait for the deactivation of its HOLD input. Note: The full arbitration logic is required if the “other” bus master does not automatically remove its hold request after having used the shared resources. Figure 9-14 Principle Arbitration Logic Compact Two-Master Systems (Master/Slave Mode) When two C167CSs (or other members of the C166 Family) are to be connected in this way the external bus arbitration logic (normally required to combine the respective output signals HLDA and BREQ) can be left out. In this case one of the controllers operates in Master Mode (the standard default operating mode, DP6.7 = ‘0’), while the other one must operate in Slave Mode (selected with DP6.7 = ‘1’). In this configuration the master-device normally controls the external bus, while the slave-device gets control of it on demand only. In most cases this requires that (at least) the slave-device operates out of internal resources most of the time, in order to get an acceptable overall system performance. MCA04369 Bus Arbiter Logic C167CR or other Master C167CR or other Master C 67CR or other Master HOLD HLDA BREQ External Bus System |
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