XC2000 datasheet(39/729 Pages) INFINEON

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XC2000 Derivatives

Peripheral Units (Vol. 2 of 2)

The General Purpose Timer Units

Preliminary

User’s Manual

14-21

V1.0, 2007-06

GPT_X7, V2.0

For counter operation, pin TxIN must be configured as input (the respective direction

control bit DPx.y must be 0). The maximum input frequency allowed in counter mode

depends on the selected prescaler value. To ensure that a transition of the count input

signal applied to TxIN is recognized correctly, its level must be held high or low for a

minimum number of module clock cycles before it changes. This information can be

found in Section 14.1.5.

Timers T2 and T4 in Incremental Interface Mode

Incremental interface mode for an auxiliary timer Tx is selected by setting bitfield TxM in

the respective register TxCON to 110

B or 111B. In incremental interface mode, the two

inputs associated with an auxiliary timer Tx (TxIN, TxEUD) are used to interface to an

incremental encoder. Tx is clocked by each transition on one or both of the external input

pins to provide 2-fold or 4-fold resolution of the encoder input.

Figure 14-14 Block Diagram of an Auxiliary Timer in Incremental Interface Mode

The operation of the auxiliary timers T2 and T4 in incremental interface mode and the

interrupt generation are the same as described for the core timer T3. The descriptions,

figures and tables apply accordingly.

MCB05398

Count

Overflow

Underflow

TxEUD

Edge

RDIR

MUX

TxUD

TxUDE

Change

Detect

TxCH

DIR

TxM

Phase

Detect

MUX

TxRC

TxR

T3R

TxIN

TxI

TxIRDIS

TxIRQ

Auxiliary

Timer Tx

Edge

Select

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