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XC2000 Datasheet(PDF) 49 Page - Infineon Technologies AG |
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XC2000 Datasheet(HTML) 49 Page - Infineon Technologies AG |
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49 / 729 page  XC2000 Derivatives Peripheral Units (Vol. 2 of 2) The General Purpose Timer Units Preliminary User’s Manual 14-31 V1.0, 2007-06 GPT_X7, V2.0 14.1.7 Interrupt Control for GPT1 Timers When a timer overflows from FFFF H to 0000H (when counting up), or when it underflows from 0000 H to FFFFH (when counting down), its interrupt request flag (T2IR, T3IR or T4IR) in register TxIC will be set. This will cause an interrupt to the respective timer interrupt vector (T2INT, T3INT or T4INT) or trigger a PEC service, if the respective interrupt enable bit (T2IE, T3IE or T4IE in register TxIC) is set. There is an interrupt control register for each of the three timers. Note: Please refer to the general Interrupt Control Register description for an explanation of the control fields. GPT12E_T2IC Timer 2 Intr. Ctrl. Reg. SFR (FF60 H/B0H) Reset Value: - - 00 H 15 14 13 12 11 10 98 76 543 210 -- --- -- GPX T2IR T2IE ILVL GLVL - - - - - - - rw rwh rw rw rw GPT12E_T3IC Timer 3 Intr. Ctrl. Reg. SFR (FF62 H/B1H) Reset Value: - - 00 H 15 14 13 12 11 10 98 76 543 210 -- --- -- GPX T3IR T3IE ILVL GLVL - - - - - - - rw rwh rw rw rw GPT12E_T4IC Timer 4 Intr. Ctrl. Reg. SFR (FF64 H/B2H) Reset Value: - - 00 H 15 14 13 12 11 10 98 76 543 210 -- --- -- GPX T4IR T4IE ILVL GLVL - - - - - - - rw rwh rw rw rw |
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