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XC2000 Datasheet(PDF) 44 Page - Infineon Technologies AG

Part # XC2000
Description  16/32-Bit Single-Chip Microcontroller with 32-Bit Performance Volume 2 (of 2): Peripheral Units
PDF  729 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

XC2000 Datasheet(HTML) 44 Page - Infineon Technologies AG

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XC2000 Derivatives
Peripheral Units (Vol. 2 of 2)
The General Purpose Timer Units
Preliminary
User’s Manual
14-26
V1.0, 2007-06
GPT_X7, V2.0
Auxiliary Timer in Capture Mode
Capture mode for an auxiliary timer Tx is selected by setting bitfield TxM in the respective
register TxCON to 101
B. In capture mode, the contents of the core timer T3 are latched
into an auxiliary timer register in response to a signal transition at the respective auxiliary
timer’s external input pin TxIN. The capture trigger signal can be a positive, a negative,
or both a positive and a negative transition.
The two least significant bits of bitfield TxI select the active transition (see Table 14-5).
Bit 2 of TxI is irrelevant for capture mode and must be cleared (TxI.2 = 0).
Note: When programmed for capture mode, the respective auxiliary timer (T2 or T4)
stops independently of its run flag T2R or T4R.
Figure 14-18 GPT1 Auxiliary Timer in Capture Mode
Upon a trigger (selected transition) at the corresponding input pin TxIN the contents of
the core timer are loaded into the auxiliary timer register and the associated interrupt
request flag TxIR will be set.
For capture mode operation, the respective timer input pin TxIN must be configured as
input. To ensure that a transition of the capture input signal applied to TxIN is recognized
correctly, its level must be held high or low for a minimum number of module clock
cycles, detailed in Section 14.1.5.
MCA05402
Toggle Latch
T3OUT
T3IRQ
Count
T3R
Core Timer T3
Operating
Mode
Control
BPS1
T3I
Up/Down
T3IN
f
GPT
Auxiliary
Timer Tx
TxI
Capture
TxIN
TxIRQ
x = 2, 4
y = 4, 2
to Ty
Edge
Select



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