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XC2000 Datasheet(PDF) 63 Page - Infineon Technologies AG |
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XC2000 Datasheet(HTML) 63 Page - Infineon Technologies AG |
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63 / 729 page ![]() XC2000 Derivatives Peripheral Units (Vol. 2 of 2) The General Purpose Timer Units Preliminary User’s Manual 14-45 V1.0, 2007-06 GPT_X7, V2.0 Timer T5 in Gated Timer Mode Gated timer mode for the auxiliary timer T5 is selected by setting bitfield T5M in register T5CON to 010 B or 011B. Bit T5M.0 (T5CON.3) selects the active level of the gate input. Note: A transition of the gate signal at line T5IN does not cause an interrupt request. Figure 14-26 Block Diagram of Auxiliary Timer T5 in Gated Timer Mode Note: There is no output toggle latch for T5. Start/stop of the auxiliary timer can be controlled locally or remotely. Timer T5 in Counter Mode Counter mode for auxiliary timer T5 is selected by setting bitfield T5M in register T5CON to 001 B. In counter mode, the auxiliary timer can be clocked either by a transition at its external input line T5IN, or by a transition of timer T6’s toggle latch T6OTL. The event causing an increment or decrement of a timer can be a positive, a negative, or both a positive and a negative transition at either the respective input pin or at the toggle latch. Bitfield T5I in control register T5CON selects the triggering transition (see Table 14-12). Prescaler Gate Ctrl. Auxiliary Timer T5 BPS2 T5I T5IN f GPT f T5 Count T5IRQ MCB05407_X4 MUX T5RC T5R T6R Clear Up/Down 0 1 MUX 0 1 T5EUD =1 T5UD T5UDE |
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