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7545 Datasheet(PDF) 38 Page - Renesas Technology Corp |
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7545 Datasheet(HTML) 38 Page - Renesas Technology Corp |
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38 / 62 page ![]() Rev.1.06 Mar 07, 2008 Page 38 of 59 REJ03B0140-0106 7545 Group CLOCK GENERATING CIRCUIT An oscillation circuit can be formed by connecting a resonator between XIN and XOUT. Use the circuit constants in accordance with the resonator manufacturer's recommended values. No external resistor is needed between XIN and XOUT since a feed-back resistor exists on-chip. (An external feed-back resistor may be needed depending on conditions.) <Ceramic resonator/quartz-crystal oscillator> When the ceramic resonator/quartz-crystal oscillator is used for the main clock, connect the ceramic resonator/quartz-crystal oscillator and the external circuit to pins XIN and XOUT at the shortest distance. A feedback resistor is built in between pins XIN and XOUT. (An external feed-back resistor may be needed depending on conditions.) Oscillation Control 1. Stop mode When the STP instruction is executed, the internal clock φ stops at an “H” level and the XIN oscillator stops. At this time, timer 1 is set to “0316” and prescaler 1 is set to “FF16”when the oscillation stabilization time set bit after release of the STP instruction is “0”. On the other hand, timer 1 and prescaler 1 are not set when the above bit is “1”. Accordingly, set the wait time fit for the oscillation stabilization time of the oscillator to be used. When an external interrupt is accepted, oscillation is restarted but the internal clock φ remains at “H” until timer 1 underflows. As soon as timer 1 underflows, the internal clock φ is supplied. This is because when a ceramic resonator is used, some time is required until a start of oscillation. In the stop mode, the voltage drop detection circuit is stopped, so that the power dissipation is reduced. 2. Wait mode If the WIT instruction is executed, the internal clock φ stops at an “H” level, but the oscillator does not stop. The internal clock restarts if a reset occurs or when an interrupt is accepted. Since the oscillator does not stop, normal operation can be started immediately after the clock is restarted. To ensure that an interrupt will be accepted to release the STP or WIT state, the corresponding interrupt enable bit must be set to “1” before the STP or WIT instruction is executed. Fig. 41 External circuit of ceramic resonator/quartz-crystal oscillator Fig. 42 Structure of CPU mode register XIN XOUT CIN COUT Rd M37545 Note: Insert a damping resistor if required. The resistance will vary depending on the oscillator and the oscillation drive capacity setting. Use the value recommended by the maker of the oscillator. Also, if the oscillator manufacturer’s data sheet specifies that a feedback resistor be added external to the chip though a feedback resistor exists on-chip, insert a feedback resistor between XIN and XOUT following the instruction. Processor mode bits (Note) b1 b0 0 0 Single-chip mode 01 10 11 Not available b7 b0 Note : The bit can be rewritten only once after releasing reset. After rewriting, it is disabled to write any data to this bit. However, by reset the bit is initialized and can be rewritten, again. It is not disabled to write any data to this bit for emulator MCU “M37545RLSS.” CPU mode register (CPUM: address 003B16, initial value: 8016) Stack page selection bit 0: 0 page 1: 1 page Clock division ratio selection bits b7 b6 0 0 : Not available 0 1 : Not available 10 : f( φ) = f(XIN)/4 1 1 : Not available Not used (returns “0” when read) |
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