7545 datasheet(60/62 Pages) RENESAS

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REVISION HISTORY

7545 Group Datasheet

Rev.

Date

Description

Page

Summary

1.00

Feb. 07, 2005

−

First edition issued

1.01

May. 10, 2005

Fig.22 : Carrier wave auto-control bit; “1” and “0” added.

Standard operation of watchdog timer and Operation of STP instruction disable bit:

address FFFA16

→ address FFDA16

Note on Watchdog Timer 2: ... set to “1” just before ...

→ ... set to “0” just before ...

Voltage Drop Detection Circuit: address FFFA16

→ address FFDA16

State transition deleted

Fig. 51 partly revised

Table 9: RPL; V

→ kΩ

Fig. 55: CNTR0

→ INT0

Notes on Watchdog timer: ... set to “1” just before ...

→ ... set to “0” just before ...

Notes on Clock Generating Circuit 1: bits 2 to 4 to 7

→ bits 2, 6, 7

1.02

Jul. 20, 2005

All pages ROM option

→ Function set ROM

Table 1: added.

ROM Code Protect Address (address FFDB16) added.

Termination of unused pins added.

[ROM option data] ROMOP

→ [Function set ROM] FSROM

Fig. 42, 43: partly revised.

(4) Wiring to CNVSS pin

→ (4) Wiring to VPP pin

DATA REQUIRED FOR QzROM WRITING ORDERS, Notes On QzROM Writing

Orders,

Notes On ROM Code Protect added.

1.03

Oct. 21, 2005

−

STP instruction disable bit

→ STP instruction function selection bit

“Operation of STP instruction function selection bit” revised.

Fig.33 Block diagram of watchdog timer and reset circuit

“Count start (Watchdog timer disable bit (bit 0 of FSROM))” added.

Function set ROM : Description revised.

Fig.42: Reserved

→ Renesas shipment test area

“When the checksum is included in the user program, avoid assigning it to

these areas.” added to Note.

Fig.43: Bit 0, bit 1 and bit 4 of FSROM revised.

1.04

May. 17, 2006

−

“PRELIMINARY” eliminated.

1.05

May. 18, 2006

Fig.4 “Under development” eliminated.

1.06

Feb. 29, 2008

Revised by additional new products (memory size)

Fig. 2 is added

Revised by additional new products (memory size and package)

Fig. 5 is added

Revised by additional new products (memory size, package, Fig. 6, and Table 4)

Fig. 9 is revised

Function set ROM Area and Notes (2) - (5) added

Clock circuit is deleted from [Function set ROM data] FSROM

Notes on use deleted

Fig. 10 is revised

Fig.12 added

20 to 24

Interrupts is revised whole

REVISION HISTORY

7545 Datasheet(PDF) 60 Page - Renesas Technology Corp

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