7545 datasheet(52/62 Pages) RENESAS

52 / 62 page

Rev.1.06

Mar 07, 2008

Page 52 of 59

REJ03B0140-0106

7545 Group

Electrical Characteristics (continued)

Timing Requirements

Switching Characteristics

NOTE:

1. Pin XOUT is excluded

Table 14

Electrical characteristics (2) (VCC = 1.8 to 3.6 V, Ta =

−20 to 85 °C, unless otherwise noted)

Symbol

Parameter

Test conditions

Limits

Unit

Min.

Typ.

Max.

ICC

Power source

current

VCC = 3.0 V, f(XIN) = 4 MHz

Output transistors

“off”

0.6

1.2

VCC = 3.0 V, f(XIN) = 4 MHz (in WIT state),

functions except timer 1 disabled,

Output transistors

“off”

0.3

0.6

All oscillation stopped (in STP state)

Output transistors

“off”

VCC

≥ VDDR ≥ VCC − 0.6 V

Ta = 25

°C0.1

1.0

µA

Ta = 85

°C

10.0

µA

IDDR

During reset by voltage drop detection circuit

VDDR = 1.1 V, 1.8 V

≥ VCC ≥ 0 V

Ta = 25

°C0.1

1.0

µA

Ta = 85

°C

10.0

µA

Table 15

Timing Requirements (VCC = 1.8 to 3.6 V, VSS = 0 V, Ta =

−20 to 85 °C, unless otherwise noted)

Symbol

Parameter

Limits

Unit

Min.

Typ.

Max.

tw(RESET)

Reset input

“L” pulse width

µs

tC(XIN)

External clock input cycle time

250

tWH(XIN)

External clock input

“H” pulse width

100

tWL(XIN)

External clock input

“L” pulse width

100

tWH(INT0)

INT0, INT1, input

“H” pulse width

460

tWL(INT0)

INT0, INT1, input

“L” pulse width

460

Table 16

Switching Characteristics (VCC = 1.8 to 3.6 V, VSS = 0 V, Ta =

−20 to 85 °C, unless otherwise noted)

Symbol

Parameter

Limits

Unit

Min.

Typ.

Max.

tr(CMOS)

CMOS output rising time (1)

100

tf(CMOS)

CMOS output falling time (1)

100

7545 Datasheet(PDF) 52 Page - Renesas Technology Corp

7545 Datasheet(HTML) 52 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62

Datasheet Download

Link URL