SH7201 datasheet(187/1196 Pages) RENESAS

187 / 1196 page

Section 6 Interrupt Controller (INTC)

Rev. 2.00 Sep. 07, 2007 Page 159 of 1164

REJ09B0321-0200

6.9

Data Transfer with Interrupt Request Signals

Interrupt request signals can be used to activate the DMAC and transfer data.

Interrupt sources that are specified to activate the DMAC are masked by setting the DMA transfer

enable bit in DREQER0 to DREQER3 to 1 without being input to the INTC.

6.9.1

Handling Interrupt Request Signals as Sources for CPU Interrupt but not DMAC

Activation

1. Clear the corresponding DMAC transfer request enable bit in DREQER0 to DREQER3 to 0.

2. When an interrupt occurs, the interrupt request will be sent to the CPU.

3. The CPU clears the interrupt source and performs the necessary processing in the interrupt

handling routine.

6.9.2

Handling Interrupt Request Signals as Sources for DMAC Activation but not CPU

Interrupt

1. Select* the signals as DMAC activating sources by setting the corresponding DMAC transfer

request enable bit in DREQER0 to DREQER3 to 1. This masks the CPU interrupt source

regardless of the interrupt priority register settings.

2. When an interrupt occurs, the activation source will be sent to the DMAC.

3. The DMAC clears the activation source during the transfer.

Note: * As for the method to select the DMAC request sources, see section 11, Direct Memory

Access Controller (DMAC).

SH7201 Datasheet(PDF) 187 Page - Renesas Technology Corp