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SH7101 Datasheet(PDF) 338 Page - Renesas Technology Corp |
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SH7101 Datasheet(HTML) 338 Page - Renesas Technology Corp |
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338 / 560 page  Section 10 Serial Communication Interface (SCI) Rev.1.00 Sep. 18, 2008 Page 304 of 522 REJ09B0069-0100 10.4.3 Clock Either an internal clock generated by the on-chip baud rate generator or an external clock input at the SCK pin can be selected as the SCI’s serial clock, according to the setting of the C/A bit in SMR and the CKE1 and CKE0 bits in SCR. When an external clock is input at the SCK pin, the clock frequency should be 16 times the bit rate used. When the SCI is operated on an internal clock, the clock can be output from the SCK pin. The frequency of the clock output in this case is equal to the bit rate, and the phase is such that the rising edge of the clock is in the middle of the transmit data, as shown in figure 10.4. The clock must not be stopped during operation. 0 1 frame D0 D1 D2 D3 D4 D5 D6 D7 0/1 1 1 SCK TxD Figure 10.4 Relation between Output Clock and Transmit Data Phase (Asynchronous Mode) |
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