SH7101 datasheet(339/560 Pages) RENESAS

339 / 560 page

Section 10 Serial Communication Interface (SCI)

Rev.1.00 Sep. 18, 2008 Page 305 of 522

REJ09B0069-0100

10.4.4

SCI Initialization (Asynchronous Mode)

Before transmitting and receiving data, you should first clear the TE and RE bits in SCR to 0, then

initialize the SCI as described below. When the operating mode, transfer format, etc., is changed,

the TE and RE bits must be cleared to 0 before making the change using the following procedure.

When the TE bit is cleared to 0, the TDRE flag is set to 1. Note that clearing the RE bit to 0 does

not initialize the contents of the RDRF, PER, FER, and ORER flags, or the contents of RDR.

When the external clock is used in asynchronous mode, the clock must be supplied even during

initialization.

Wait

Yes

[1]

Start transmission

Clear RIE, TIE, TEIE, MPIE,

TE, and RE bits in SCR to 0*

[2]

Set value in BRR

[3]

[4]

[5]

1-bit interval elapsed?

< Initialization completion>

[1] Set the clock selection in SCR.

[2] Set the data transfer format in SMR

and SCMR.

[3] Write a value corresponding to the

bit rate to BRR. Not necessary if an

external colck is used.

[4] Set PFC of the external pin used.

Set RxD input during receiving and

TxD output during transmitting. Set

SCK input/output according to

contents set by CKE1 and CKE0.

When CKE1 and CKE0 are 0 in

asynchronous mode, setting the

SCK pin is unnecessary.

Outputting clocks from the SCK pin

starts at synchronous clock output

setting.

[5] Wait at least one bit interval, then

set the TE bit or RE bit in SCR to

1.* At this time, the TxD, RxD, and

SCK pins can be used. The TxD

pin is in a mark state during

transmitting, and RxD pin is in an

idle state for waiting the start bit

during receiving.

Set data transfer format in

SMR

Set PFC of the external pin used

SCK, TxD, RxD

Set SCR RIE, TIE, TEIE,

and MPIE bits and set

SCR TE and RE bits to 1.

Set CKE1 and CKE0 bits in SCR

(TE and RE bits are 0)

Note : * In simultaneous transmit/receive operation, the TE and RE bits must be cleared to 0 or set to 1

simultaneously.

Figure 10.5 Sample SCI Initialization Flowchart

SH7101 Datasheet(PDF) 339 Page - Renesas Technology Corp

SH7101 Datasheet(HTML) 339 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL