SH7101 datasheet(397/560 Pages) RENESAS

397 / 560 page

Section 13 Motor Management Timer (MMT)

Rev.1.00 Sep. 18, 2008 Page 363 of 522

REJ09B0069-0100

13.2

Input/Output Pins

Table 13.1 shows the pin configuration of the MMT.

Table 13.1

Pin Configuration

Name

I/O

Function

PCIO

I/O

Counter clear signal input when set as an input by PAIORL; toggle

output in synchronization with the PWM cycle when set as an output

by PAIORL.

PUOA

Output

PWMU phase output (positive phase)

PUOB

Output

PWMU phase output (negative phase)

PVOA

Output

PWMV phase output (positive phase)

PVOB

Output

PWMV phase output (negative phase)

PWOA

Output

PWMW phase output (positive phase)

PWOB

Output

PWMW phase output (negative phase)

13.3

The MMT has the following registers. For details on register addresses and the register states

during each processing, refer to section 19, List of Registers.

• Timer mode register (MMT_TMDR*)

• Timer control register (TCNR)

• Timer status register (MMT_TSR*)

• Timer counter (MMT_TCNT*)

• Timer buffer register U (TBRU)

• Timer buffer register V (TBRV)

• Timer buffer register W (TBRW)

• Timer general register UU (TGRUU)

• Timer general register VU (TGRVU)

• Timer general register WU (TGRWU)

• Timer general register U (TGRU)

• Timer general register V (TGRV)

• Timer general register W (TGRW)

• Timer general register UD (TGRUD)

• Timer general register VD (TGRVD)

SH7101 Datasheet(PDF) 397 Page - Renesas Technology Corp

SH7101 Datasheet(HTML) 397 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL