SH7101 datasheet(401/560 Pages) RENESAS

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Section 13 Motor Management Timer (MMT)

Rev.1.00 Sep. 18, 2008 Page 367 of 522

REJ09B0069-0100

13.3.3

Timer Status Register (MMT_TSR)

MMT_TSR holds status flags. (In this section, the name of this register is abbreviated to TSR

hereafter.)

Bit

Bit Name

Initial

Value

R/W

Description

TCFD

Count Direction Flag

Status flag that indicates the count direction of the

TCNT counter.

0: TCNT counts down

1: TCNT counts up

6 to 2

⎯

All 0

Reserved

These bits are always read as 0. The write value

should always be 0.

TGFN

R/(W)*

Output Compare Flag N

Status flag that indicates a compare match between

TCNT and 2Td (Td: TDDR value).

[Setting condition]

• When TCNT = 2Td

[Clearing condition]

• When 0 is written to TGFN after reading TGFN = 1

TGFM

R/(W)*

Output Compare Flag M

Status flag that indicates a compare match between

TCNT and TPDR.

[Setting condition]

• When TCNT = TPDR

[Clearing condition]

• When 0 is written to TGFM after reading TGFM = 1

Note:

Only 0 can be written for flag clearing.

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