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SH7101 Datasheet(PDF) 402 Page - Renesas Technology Corp

Part # SH7101
Description  32-Bit RISC Microcomputer
PDF  560 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7101 Datasheet(HTML) 402 Page - Renesas Technology Corp

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Section 13 Motor Management Timer (MMT)
Rev.1.00 Sep. 18, 2008 Page 368 of 522
REJ09B0069-0100
13.3.4
Timer Counter (MMT_TCNT)
MMT_TCNT is a 16-bit counter. The initial value is H'0000. Only 16-bit access can be used on
MMT_TCNT; 8-bit access is not possible. (In this section, the name of this register is abbreviated
to TCNT hereafter.)
13.3.5
Timer Buffer Registers (TBR)
TBR function as 16-bit buffer registers. The MMT has three TBR registers; TBRU, TBRV, and
TBRW, each of which has two addresses; a buffer operation address (shown first) and a free
operation address (shown second). A value written to the buffer operation address is transferred to
the corresponding TGR at the timing set in bits MD1 and MD0 in the timer mode register
(TMDR). A value set in the free operation address is transferred to the corresponding TGR
immediately. The initial value of TBR is H'FFFF. Only 16-bit access can be used on the TBR
registers; 8-bit access is not possible.
13.3.6
Timer General Registers (TGR)
TGR function as 16-bit compare registers. The MMT has nine TGR registers, that are compared
with the TCNT counter in the operating modes. The initial value of TGR is H'FFFF. Only 16-bit
access can be used on the TGR registers; 8-bit access is not possible.
13.3.7
Timer Dead Time Counter (TDCNT)
TDCNT is a 16-bit read-only counter. The initial value of TDCNT is H'0000. Only 16-bit access
can be used on TDCNT; 8-bit access is not possible.
13.3.8
Timer Dead Time Data Register (MMT_TDDR)
MMT_TDDR is a 16-bit register that sets the positive phase and negative phase non-overlap time
(dead time). The initial value of MMT_TDDR is H'FFFF. Only 16-bit access can be used on
MMT_TDDR; 8-bit access is not possible. (In this section, the name of this register is further
abbreviated to TDDR hereafter.)
13.3.9
Timer Period Buffer Register (TPBR)
TPBR is a 16-bit register that functions as a buffer register for TPDR. A value of 1/2 the PWM
carrier period should be set as the TPBR value. The TPBR value is transferred to TPDR at the
transfer timing set in TMDR. The initial value of TPBR is H'FFFF. Only 16-bit access can be used
on TPBR; 8-bit access is not possible.



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