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SH7101 Datasheet(PDF) 467 Page - Renesas Technology Corp |
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SH7101 Datasheet(HTML) 467 Page - Renesas Technology Corp |
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467 / 560 page ![]() Section 15 I/O Ports Rev.1.00 Sep. 18, 2008 Page 433 of 522 REJ09B0069-0100 15.2.1 Register Description Port B is a 4-bit input/output port in the SH7108 and a 6-bit input/output port in the SH7109. Port B has the following register. For details on register addresses and register states during each processing, refer to section 19, List of Registers. • Port B data register (PBDR) 15.2.2 Port B Data Register (PBDR) PBDR is a 16-bit readable/writable register that stores port B data. In the SH7108, bits PB5DR to PB2DR correspond to pins PB5 to PB2 (multiplexed functions omitted here). In the SH7109, bits PB5DR to PB0DR correspond to pins PB5 to PB0 (multiplexed functions omitted here). When a pin functions is a general output, if a value is written to PBDR, that value is output directly from the pin, and if PBDR is read, the register value is returned directly regardless of the pin state. When a pin functions is a general input, if PBDR is read, the pin state, not the register value, is returned directly. If a value is written to PBDR, although that value is written into PBDR, it does not affect the pin state. Table 15.2 summarizes port B data register read/write operations. Bit Bit Name Initial Value R/W Description 15 to 6 — All 0 R Reserved These bits are always read as 0. The write value should always be 0. 5 PB5DR 0 R/W See table 15.2. 4 PB4DR 0 R/W 3 PB3DR 0 R/W 2 PB2DR 0 R/W 1 PB1DR 0/1 R/W See table 15.2.* 0 PB0DR 0/1 R/W Note: * These bits are reserved in the SH7108. They have no corresponding pins. The write value should always be 0. |
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