SH7101 datasheet(469/560 Pages) RENESAS

469 / 560 page

Section 15 I/O Ports

Rev.1.00 Sep. 18, 2008 Page 435 of 522

REJ09B0069-0100

15.3.2

Port D Data Register L (PDDRL)

PDDRL is a 16-bit readable/writable register that stores port D data. Bits PD8DR to PD0DR

correspond to pins PD8 to PD0 (multiplexed functions omitted here).

When a pin functions is a general output, if a value is written to PDDRL, that value is output

directly from the pin, and if PDDRL is read, the register value is returned directly regardless of the

pin state.

When a pin functions is a general input, if PDDRL is read, the pin state, not the register value, is

returned directly. If a value is written to PDDRL, although that value is written into PDDRL, it

does not affect the pin state. Table 15.3 summarizes port D data register L read/write operations.

Bit

Bit Name

Initial Value

R/W

Description

15 to 9

—

All 0

Reserved

These bits are always read as 0. The write

value should always be 0.

PD8DR

R/W

See table 15.3.

PD7DR

R/W

PD6DR

R/W

PD5DR

R/W

PD4DR

R/W

PD3DR

R/W

PD2DR

R/W

PD1DR

R/W

PD0DR

R/W

Table 15.3

Port D Data Register L (PDDRL) Read/Write Operations

• Bits 8 to 0

PDIORL

Pin Function

Read

Write

General input

Pin state

Can write to PDDRL, but it has no effect on pin

state

Other than

general input

Pin state

Can write to PDDRL, but it has no effect on pin

state

General output

PDDRL value

Value written is output from pin

Other than

general output

PDDRL value

Can write to PDDRL, but it has no effect on pin

state

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