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SH7101 Datasheet(PDF) 472 Page - Renesas Technology Corp |
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SH7101 Datasheet(HTML) 472 Page - Renesas Technology Corp |
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472 / 560 page ![]() Section 15 I/O Ports Rev.1.00 Sep. 18, 2008 Page 438 of 522 REJ09B0069-0100 15.4.2 Port E Data Registers H and L (PEDRH and PEDRL) PEDRH and PEDRL are 16-bit readable/writable registers that store port E data. Bits PE21DR to PE0DR correspond to pins PE21 to PE0 (multiplexed functions omitted here). When a pin functions is a general output, if a value is written to PEDRH or PEDRL, that value is output directly from the pin, and if PEDRH or PEDRL is read, the register value is returned directly regardless of the pin state. When a pin functions is a general input, if PEDRH or PEDRL is read, the pin state, not the register value, is returned directly. If a value is written to PEDRH or PEDRL, although that value is written into PEDRH or PEDRL it does not affect the pin state. Table 15.4 summarizes port E data register read/write operations. • PEDRH Bit Bit Name Initial Value R/W Description 15 to 6 — All 0 R Reserved These bits are always read as 0. The write value should always be 0. 5 PE21DR 0 R/W See table 15.4. 4 PE20DR 0 R/W 3 PE19DR 0 R/W 2 PE18DR 0 R/W 1 PE17DR 0 R/W 0 PE16DR 0 R/W |
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