SH7101 datasheet(473/560 Pages) RENESAS

473 / 560 page

Section 15 I/O Ports

Rev.1.00 Sep. 18, 2008 Page 439 of 522

REJ09B0069-0100

• PEDRL

Bit

Bit Name

Initial Value

R/W

Description

PE15DR

R/W

See table 15.4.

PE14DR

R/W

PE13DR

R/W

PE12DR

R/W

PE11DR

R/W

PE10DR

R/W

PE9DR

R/W

PE8DR

R/W

PE7DR

R/W

PE6DR

R/W

PE5DR

R/W

PE4DR

R/W

PE3DR

R/W

PE2DR

R/W

PE1DR

R/W

PE0DR

R/W

Table 15.4

Port E Data Registers H and L (PEDRH and PEDRL) Read/Write Operations

• Bits 5 to 0 in PEDRH and bits 15 to 0 in PEDRL

PEIOR

Pin Function

Read

Write

General input

Pin state

Can write to PEDRH or PEDRL, but it has no

effect on pin state

Other than

general input

Pin state

Can write to PEDRH or PEDRL, but it has no

effect on pin state

General output

Value written is output from pin (

POE pin = high)*

PEDRH or

PEDRL value

High impedance regardless of PEDRH or PEDRL

value (

POE pin = low)*

Other than

general output

PEDRH or

PEDRL value

Can write to PEDRH or PEDRL, but it has no

effect on pin state

Note:

Control by the

POE pin is only available for large current-output pins (PE9 and PE11 to

PE21).

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