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SH7101 Datasheet(PDF) 104 Page - Renesas Technology Corp |
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SH7101 Datasheet(HTML) 104 Page - Renesas Technology Corp |
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104 / 560 page ![]() Section 5 Exception Processing Rev.1.00 Sep. 18, 2008 Page 70 of 522 REJ09B0069-0100 5.7 Stack Status after Exception Processing Ends The status of the stack after exception processing ends is shown in table 5.11. Table 5.11 Stack Status after Exception Processing Ends Types Stack Status Address error 32 bits 32 bits SR Address of instruction after executed instruction SP Trap instruction 32 bits 32 bits SR Address of instruction after TRAPA instruction SP General illegal instruction 32 bits 32 bits SR Address of instruction after general illegal instruction SP Interrupt 32 bits 32 bits SR Address of instruction after executed instruction SP Illegal slot instruction 32 bits 32 bits SR Jump destination address of delay branch instruction SP |
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