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SH7101 Datasheet(PDF) 105 Page - Renesas Technology Corp

Part # SH7101
Description  32-Bit RISC Microcomputer
PDF  560 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7101 Datasheet(HTML) 105 Page - Renesas Technology Corp

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Section 5 Exception Processing
Rev.1.00 Sep. 18, 2008 Page 71 of 522
REJ09B0069-0100
5.8
Usage Notes
5.8.1
Value of Stack Pointer (SP)
The value of the stack pointer must always be a multiple of four. If it is not, an address error will
occur when the stack is accessed during exception processing.
5.8.2
Value of Vector Base Register (VBR)
The value of the vector base register must always be a multiple of four. If it is not, an address error
will occur when the stack is accessed during exception processing.
5.8.3
Address Errors Caused by Stacking of Address Error Exception Processing
When the value of the stack pointer is not a multiple of four, an address error will occur during
stacking of the exception processing (interrupts, etc.) and address error exception processing will
start after the first exception processing is ended. Address errors will also occur in the stacking for
this address error exception processing. To ensure that address error exception processing does not
go into an endless loop, no address errors are accepted at that point. This allows program control
to be shifted to the service routine for address error exception and enables error processing.
When an address error occurs during exception processing stacking, the stacking bus cycle (write)
is executed. During stacking of the status register (SR) and program counter (PC), the value of SP
is reduced by 4 for both of SR and PC, therefore the value of SP is still not a multiple of four after
the stacking. The address value output during stacking is the SP value, so the address itself where
the error occurred is output. This means that the write data stacked is undefined.



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