SH7101 datasheet(191/560 Pages) RENESAS

191 / 560 page

Section 8 Multifunction Timer Pulse Unit (MTU)

Rev.1.00 Sep. 18, 2008 Page 157 of 522

REJ09B0069-0100

Table 8.28

Output Level Select Function

Function

Bit 2

Bit 1

Bit 0

TIOC3B

TIOC4A

TIOC4B

TIOC3D

TIOC4C

TIOC4D

U Phase

V Phase

W Phase

U Phase

V Phase

W Phase

OFF

8.3.13

Timer Subcounter (TCNTS)

TCNTS is a 16-bit read-only counter that is used only in complementary PWM mode. The initial

value is H'0000.

Note:

Accessing the TCNTS in 8-bit units is prohibited. Always access in 16-bit units.

8.3.14

Timer Dead Time Data Register (TDDR)

TDDR is a 16-bit register, used only in complementary PWM mode, that specifies the TCNT_3

and TCNT_4 counter offset values. In complementary PWM mode, when the TCNT_3 and

TCNT_4 counters are cleared and then restarted, the TDDR register value is loaded into the

TCNT_3 counter and the count operation starts. The initial value is H'FFFF.

Note:

Accessing the TDDR in 8-bit units is prohibited. Always access in 16-bit units.

8.3.15

Timer Period Data Register (TCDR)

TCDR is a 16-bit register used only in complementary PWM mode. Set half the PWM carrier sync

value as the TCDR register value. This register is constantly compared with the TCNTS counter in

complementary PWM mode, and when a match occurs, the TCNTS counter switches direction

(decrement to increment). The initial value is H'FFFF.

Note:

Accessing the TCDR in 8-bit units is prohibited. Always access in 16-bit units.

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