SH7101 datasheet(192/560 Pages) RENESAS

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Section 8 Multifunction Timer Pulse Unit (MTU)

Rev.1.00 Sep. 18, 2008 Page 158 of 522

REJ09B0069-0100

8.3.16

Timer Period Buffer Register (TCBR)

The timer period buffer register (TCBR) is a 16-bit register used only in complementary PWM

mode. It functions as a buffer register for the TCDR register. The TCBR register values are

transferred to the TCDR register with the transfer timing set in the TMDR register. The initial

value is H'FFFF.

Note:

Accessing the TCBR in 8-bit units is prohibited. Always access in 16-bit units.

8.3.17

Bus Master Interface

The timer counters (TCNT), general registers (TGR), timer subcounter (TCNTS), timer period

buffer register (TCBR), and timer dead time data register (TDDR), and timer period data register

(TCDR) are 16-bit registers. A 16-bit data bus to the bus master enables 16-bit read/writes. 8-bit

read/write is not possible. Always access in 16-bit units.

All registers other than the above registers are 8-bit registers. These are connected to the CPU by a

16-bit data bus, so 16-bit read/writes and 8-bit read/writes are both possible.

8.4

Operation

8.4.1

Basic Functions

Each channel has a TCNT and TGR register. TCNT performs up-counting, and is also capable of

free-running operation, synchronous counting, and external event counting.

Each TGR can be used as an input capture register or output compare register.

Always set the MTU external pins function using the pin function controller (PFC).

Counter Operation

When one of bits CST0 to CST4 is set to 1 in TSTR, the TCNT counter for the corresponding

channel begins counting. TCNT can operate as a free-running counter, periodic counter, for

example.

Example of Count Operation Setting Procedure: Figure 8.3 shows an example of the count

operation setting procedure.

SH7101 Datasheet(PDF) 192 Page - Renesas Technology Corp