SH7101 datasheet(188/560 Pages) RENESAS

188 / 560 page

Section 8 Multifunction Timer Pulse Unit (MTU)

Rev.1.00 Sep. 18, 2008 Page 154 of 522

REJ09B0069-0100

8.3.11

Timer Output Control Register (TOCR)

TOCR is an 8-bit readable/writable register that enables/disables PWM synchronized toggle

output in complementary PWM mode/reset synchronized PWM mode, and controls output level

inversion of PWM output.

Bit

Bit Name

Initial

value

R/W

Description

—

Reserved

This bit is always read as 0. The write value should

always be 0.

PSYE

R/W

PWM Synchronous Output Enable

This bit selects the enable/disable of toggle output

synchronized with the PWM period.

0: Toggle output is disabled

1: Toggle output is enabled

5 to 2 —

All 0

Reserved

These bits are always read as 0. The write value should

always be 0.

OLSN

R/W

Output Level Select N

This bit selects the reverse phase output level in reset-

synchronized PWM mode/complementary PWM mode.

See table 8.26

OLSP

R/W

Output Level Select P

This bit selects the positive phase output level in reset-

synchronized PWM mode/complementary PWM mode.

See table 8.27

Table 8.26

Output Level Select Function

Bit 1

Function

Compare Match Output

OLSN

Initial Output

Active Level

Increment Count

Decrement Count

High level

Low level

High level

Low level

High level

Low level

High level

Note:

The reverse phase waveform initial output value changes to active level after elapse of the

dead time after count start.

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