SH7101 datasheet(198/560 Pages) RENESAS

198 / 560 page

Section 8 Multifunction Timer Pulse Unit (MTU)

Rev.1.00 Sep. 18, 2008 Page 164 of 522

REJ09B0069-0100

Example of Synchronous Operation Setting Procedure: Figure 8.11 shows an example of the

synchronous operation setting procedure.

Yes

Set synchronous

operation

Clearing

source generation

channel?

Select counter

clearing source

Start count

Set synchronous

counter clearing

Start count

[1]

[3]

[5]

[4]

[5]

[2]

Synchronous operation

selection

[1] Set to 1 the SYNC bits in TSYR corresponding to the channels to be designated for synchronous

operation.

[2] When the TCNT counter of any of the channels designated for synchronous operation is written to,

the same value is simultaneously written to the other TCNT counters.

[3] Use bits CCLR2 to CCLR0 in TCR to specify TCNT clearing by input capture/output compare, etc.

[4] Use bits CCLR2 to CCLR0 in TCR to designate synchronous clearing for the counter clearing source.

[5] Set to 1 the CST bits in TSTR for the relevant channels, to start the count operation.

Set TCNT

Synchronous presetting

Synchronous clearing

Figure 8.11 Example of Synchronous Operation Setting Procedure

Example of Synchronous Operation: Figure 8.12 shows an example of synchronous operation.

In this example, synchronous operation and PWM mode 1 have been designated for channels 0 to

2, TGRB_0 compare match has been set as the channel 0 counter clearing source, and

synchronous clearing has been set for the channel 1 and 2 counter clearing source.

Three-phase PWM waveforms are output from pins TIOC0A, TIOC1A, and TIOC2A. At this

time, synchronous presetting, and synchronous clearing by TGRB_0 compare match, are

performed for channel 0 to 2 TCNT counters, and the data set in TGRB_0 is used as the PWM

cycle.

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