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SH7101 Datasheet(PDF) 200 Page - Renesas Technology Corp

Part # SH7101
Description  32-Bit RISC Microcomputer
PDF  560 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7101 Datasheet(HTML) 200 Page - Renesas Technology Corp

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Section 8 Multifunction Timer Pulse Unit (MTU)
Rev.1.00 Sep. 18, 2008 Page 166 of 522
REJ09B0069-0100
• When TGR is an output compare register
When a compare match occurs, the value in the buffer register for the corresponding channel is
transferred to the timer general register.
This operation is illustrated in figure 8.13.
Buffer
register
Timer general
register
TCNT
Comparator
Compare match signal
Figure 8.13 Compare Match Buffer Operation
• When TGR is an input capture register
When input capture occurs, the value in TCNT is transferred to TGR and the value previously
held in the timer general register is transferred to the buffer register.
This operation is illustrated in figure 8.14.
Buffer
register
Timer general
register
TCNT
Input capture
signal
Figure 8.14 Input Capture Buffer Operation
Example of Buffer Operation Setting Procedure: Figure 8.15 shows an example of the buffer
operation setting procedure.
Buffer operation
Select TGR function
Set buffer operation
Start count
<Buffer operation>
[1]
[2]
[3]
[1] Designate TGR as an input capture register or
output compare register by means of TIOR.
[2] Designate TGR for buffer operation with bits
BFA and BFB in TMDR.
[3] Set the CST bit in TSTR to 1 start the count
operation.
Figure 8.15 Example of Buffer Operation Setting Procedure



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