SH7101 datasheet(317/560 Pages) RENESAS

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Section 10 Serial Communication Interface (SCI)

SCIS200B_010020030200

Rev.1.00 Sep. 18, 2008 Page 283 of 522

REJ09B0069-0100

Section 10 Serial Communication Interface (SCI)

This LSI has two independent serial communication interface (SCI) channels. The SCI can handle

both asynchronous and clocked synchronous serial communication. In asynchronous serial

communication mode, serial data communication can be carried out with standard asynchronous

communication chips such as a Universal Asynchronous Receiver/Transmitter (UART) or

Asynchronous Communication Interface Adapter (ACIA). A function is also provided for serial

communication between processors (multiprocessor communication function).

10.1

Features

• Choice of asynchronous or clocked synchronous serial communication mode

• Full-duplex communication capability

The transmitter and receiver are mutually independent, enabling transmission and reception to

be executed simultaneously.

Double-buffering is used in both the transmitter and the receiver, enabling continuous

transmission and continuous reception of serial data.

• On-chip baud rate generator allows any bit rate to be selected

External clock can be selected as a transfer clock source.

• Choice of LSB-first or MSB-first transfer* (except in the case of asynchronous mode 7-bit

data)

• Four interrupt sources

Four interrupt sources — transmit-end, transmit-data-empty, receive-data-full, and receive

error — that can issue requests.

• Module standby mode can be set

Asynchronous mode

• Data length: 7 or 8 bits

• Stop bit length: 1 or 2 bits

• Parity: Even, odd, or none

• Multiprocessor bit: 1 or 0

• Receive error detection: Parity, overrun, and framing errors

• Break detection: Break can be detected by reading the RxD pin level directly in case of a

framing error

SH7101 Datasheet(PDF) 317 Page - Renesas Technology Corp