SH7101 datasheet(320/560 Pages) RENESAS

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Section 10 Serial Communication Interface (SCI)

Rev.1.00 Sep. 18, 2008 Page 286 of 522

REJ09B0069-0100

10.3.1

Receive Shift Register (RSR)

RSR is a shift register used to receive serial data that is input to the RxD pin and convert it into

parallel data. When one byte of data has been received, it is transferred to RDR automatically.

RSR cannot be directly read or written to by the CPU.

10.3.2

Receive Data Register (RDR)

RDR is an 8-bit register that stores receive data. When the SCI has received one byte of serial

data, it transfers the received serial data from RSR to RDR where it is stored. After this, RSR is

receive-enabled. Since RSR and RDR function as a double buffer in this way, enables continuous

receive operations to be performed. After confirming that the RDRF bit in SSR is set to 1, read

RDR for only once. RDR cannot be written to by the CPU. RDR is initialized to H'00.

10.3.3

Transmit Shift Register (TSR)

TSR is a shift register that transmits serial data. To perform serial data transmission, the SCI first

transfers transmit data from TDR to TSR, then sends the data to the TxD pin. TSR cannot be

directly accessed by the CPU.

10.3.4

Transmit Data Register (TDR)

TDR is an 8-bit register that stores transmit data. When the SCI detects that TSR is empty, it

transfers the transmit data written in TDR to TSR and starts transmission. The double-buffered

structures of TDR and TSR enables continuous serial transmission. If the next transmit data has

already been written to TDR during serial transmission, the SCI transfers the written data to TSR

to continue transmission. Although TDR can be read or written to by the CPU at all times, to

achieve reliable serial transmission, write transmit data to TDR for only once after confirming that

the TDRE bit in SSR is set to 1. TDR is initialized to H'FF.

SH7101 Datasheet(PDF) 320 Page - Renesas Technology Corp