SH7101 datasheet(321/560 Pages) RENESAS

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Section 10 Serial Communication Interface (SCI)

Rev.1.00 Sep. 18, 2008 Page 287 of 522

REJ09B0069-0100

10.3.5

Serial Mode Register (SMR)

SMR is used to set the SCI’s serial transfer format and select the baud rate generator clock source.

Bit

Bit Name

Initial

Value

R/W

Description

R/W

Communication Mode

0: Asynchronous mode

1: Clocked synchronous mode

CHR

R/W

Character Length (enabled only in asynchronous mode)

0: Selects 8 bits as the data length.

1: Selects 7 bits as the data length. LSB-first is fixed and

the MSB (bit 7) of TDR is not transmitted in

transmission.

In clocked synchronous mode, a fixed data length of 8

bits is used.

R/W

Parity Enable (enabled only in asynchronous mode)

When this bit is set to 1, the parity bit is added to transmit

data before transmission, and the parity bit is checked in

reception. For a multiprocessor format, parity bit addition

and checking are not performed regardless of the PE bit

setting.

R/W

Parity Mode (enabled only when the PE bit is 1 in

asynchronous mode)

0: Selects even parity.

1: Selects odd parity.

STOP

R/W

Stop Bit Length (enabled only in asynchronous mode)

Selects the stop bit length in transmission.

0: 1 stop bit

1: 2 stop bits

In reception, only the first stop bit is checked. If the

second stop bit is 0, it is treated as the start bit of the

next transmit character.

R/W

Multiprocessor Mode (enabled only in asynchronous

mode)

When this bit is set to 1, the multiprocessor

communication function is enabled. The PE bit and O/

bit settings are invalid in multiprocessor mode.

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