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HD6433644R Datasheet(PDF) 370 Page - Renesas Technology Corp |
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HD6433644R Datasheet(HTML) 370 Page - Renesas Technology Corp |
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370 / 549 page ![]() Section 12 A/D Converter Rev. 6.00 Sep 12, 2006 page 350 of 526 REJ09B0326-0600 Bits 3 to 0 Channel Select (CH3 to CH0): Bits 3 to 0 select the analog input channel. The channel selection should be made while bit ADSF is cleared to 0. Bit 3: CH3 Bit 2: CH2 Bit 1: CH1 Bit 0: CH0 Analog Input Channel 0 0 * * No channel selected (initial value) 1 0 0 AN0 1 AN1 1 0 AN2 1 AN3 1 0 0 0 AN4 1 AN5 1 0 AN6 1 AN7 1 0 0 Reserved 1 Reserved 1 0 Reserved 1 Reserved Legend: * Don’t care 12.2.3 A/D Start Register (ADSR) Bit 7 6 5 4 3 2 1 0 ADSF Initial value 0 1 1 1 1 1 1 1 Read/Write R/W The A/D start register (ADSR) is an 8-bit read/write register for starting and stopping A/D conversion. A/D conversion is started by writing 1 to the A/D start flag (ADSF) or by input of the designated edge of the external trigger signal, which also sets ADSF to 1. When conversion is complete, the converted data is set in the A/D result register (ADRR), and at the same time ADSF is cleared to 0. |
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